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Company: AMD
Location: Santa Clara, CA
Career Level: Mid-Senior Level
Industries: Technology, Software, IT, Electronics

Description



WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_



THE ROLE:

We are looking for an adaptive, self-motivated formal verification engineer to join our growing team. As a key contributor, you will be part of a highly collaborative team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. Specifically, the Formal Verification Team is an integral part of AMD's Cores Development Team, responsible for the development of the next generation processor cores. This team embraces innovation to improve time to market while beating performance, power and quality expectations.

THE PERSON:

You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:

Apply Advanced Formal Verification Techniques to AMDs cutting edge design for achieving Full Proofs.

Maintain the best-in-class formal verification infrastructure to improve formal verification productivity.

Develop technical relationship with broader AMD Design community and peers.

Drive cross-department innovation and collaboration inside AMD.

Be part of the R&D group for emerging formal verification domains like security, safety, low power, architecture level formal verification, etc.

PREFERRED EXPERIENCE:

ASIC design, verification, or related work experience in Formal Verification.  

Verification skills: Formal verification, Assertion based verification, FPV and/or DPV. 

Complexity Analysis, Design Abstraction & Formal Coverage. 

Design debug, Deep bug hunting. 

Formal test planning, Formal tools – Jasper and/or VC-formal. 

System Verilog, Verilog or VHDL, Scripting (TCL/Python) skills required. 

Design knowledge either or all domains of CPU, GPU, Bus/Noc/Interconnect, Memory Controllers, Cache preferred. 

ACADEMIC CREDENTIALS:

BS in Computer Engineering, Computer Science, Electrical Engineering or other related fields with extensive work experience, and/or MS / PhD with some work experience.

LOCATION: 

Santa Clara, CA

 

 

 

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At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD's Employee Stock Purchase Plan. You'll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.


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