Systems Design Eng. Job Listing at AMD in Austin, TX (Job ID 77050-en-us)

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING 

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  

THE ROLE:  

The CGC‑Tools team develops and sustains the advanced debug infrastructure that underpins AMD's client, graphics, and custom product lines. A CGC‑Tools engineer is responsible for enabling end‑to‑end debug capabilities spanning on‑chip instrumentation, JTAG over USB‑C solutions, automated data capture, and scalable server‑side analysis. This role supports the full lifecycle of silicon: bring‑up, validation, customer debug, and high‑volume production. 

Key responsibilities include designing, implementing, and maintaining tooling related to JTAG hardware, ADS (Automated Debug System), memory bring‑up, scan infrastructure, emerging technologies such as microprocessor based debug, and in-chassis hardware used to transport JTAG over USB. Engineers will collaborate cross‑functionally with AMD's CSG Tools, S3 Platform, DFX/StimGen, validation teams, InfoSec, and external partners to deliver robust debug pathways both inside AMD labs and externally to ODMs and customers. 

The role involves contributing to the development of next‑generation debug architectures, enabling automated data collection pipelines, creating or extending IP inspection libraries, and ensuring debug data is securely transported, preserved, and leveraged for engineering analysis and AI‑based tooling. CGC‑Tools engineers support customer‑facing debug workflows, participate in JTAG tool escalation processes, and develop firmware specifications for future silicon debug features. Workstreams also include shipping new external JTAG device software releases, supporting USB‑driven scan, maintaining QA automation infrastructure, and enabling multi‑BU program readiness across upcoming SOCs. 

THE PERSON:  

Ideal candidates are systems‑minded engineers with strong software, firmware, or hardware debug expertise; familiarity with JTAG, Python, low level data manipulation, containerized tools, and large‑scale automation; and the ability to work across multiple SOC programs in a fast‑moving environment. This role is central to the evolution of AMD's debug capability and requires technical depth, cross‑team communication, and a passion for building reliable engineering infrastructure. 

KEY RESPONSIBILITIES:  

• Study upcoming SOCs and identify areas in need of advanced debug tools 

• Work with IP teams to acquire functional understanding of IP blocks and procedures for making operational health assessments of the IP block's state 

• Work with firmware teams to instrument debug data into mission mode firmware 

• Work with IP teams to influence the addition of DFD features into future silicon 

• Write specs to outline how to perform debug data collection for in-chip microcontrollers responsible for executing debug actions 

• Build Python libraries that can capture debug data and evaluate the health of an IP block 

• Contribute to JTAG tools hardware development 

• Contribute to JTAG tools software development  

• Contribute to Automated Debug System debug service distributed application 

• Build and monitor automated QA execution of debug tools setup as CI/CD pipelines 

• Assist in the construction of K8 containers to execute the debug service 

• Work with regional Customer Engineering teams to enable AMD debug features within end customer designs 

• Work with IT and infosec to enable secure VPN tunnel for JTAG devices   

PREFERRED EXPERIENCE:  

• x86 system knowledge 

• SOC internal architecture 

• JTAG HW tools 

• Python, C, Java, JavaScript  

• Kubernetes containers 

• Linux  

• USB  

• System level debugging 

• BIOS  

• Firmware development 

• Platform design 

• Validation knowledge 

• Strong analytical/problem-solving skills and pronounced attention to details 

• Must be a self-starter, and able to independently drive tasks to completion 

• Debug techniques and methodologies 

• Good communication skills 

ACADEMIC CREDENTIALS: 

• Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or Computer Science  

This role is not eligible for visa sponsorship.

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Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD's “Responsible AI Policy” is available here.

This posting is for an existing vacancy.