Sr. Manager Silicon Design Engineering ( Verification ) Job Listing at AMD in Hyderabad, TS (Job ID 37002-en-us)

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

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SENIOR MANAGER SILICON DESIGN ENGINEER  

THE ROLE: 

AMD seeks a passionate, collaborative leader with strong technical skills and the initiative to motivate an expert team. You will manage a Silicon Engineering group and innovate with internal teams and external partners to create the next generation of computing technologies.  

The verification team at AMD is looking for a Senior Manager to manage and lead a team of verification engineers working in multiple cutting edge areas including AI subsystems, RISC-V based processors, PCIe and Network on Chip (NOC). The individual will help drive the successful execution of these projects including resource planning, hiring, project management, risk mitigation and execution.  A key element of success in this role is the ability to define and track the technical dependencies for successful project completion in multiple simultaneous products and areas.  

THE PERSON: 

The ideal candidate has experience leading others in technical and managerial settings. You also have excellent communication, writing, and presentation skills.  

KEY RESPONSIBILITIES: 

• Lead a high-performance engineering team 
• Form a team and nurture talent 
• Lead team, meet schedule commitments and provide strong support to customers 
• Collaborate with multi-functional leaders to drive AMD's success  
• Verification of IPs and subsystems in the areas of AI, RISC-V, PCIe and Network on Chip (NOC)
• Staffing, including resource planning and hiring of engineers in the team
• Managing and tracking project execution to tight deadlines
• Risk mitigation and communicating risks in a timely fashion to upper management and stakeholders
• Performance assessment and feedback for all team members
• Provide technical feedback on verification testbench architecture, verification testplans and test execution
• Training and mentoring team for high efficiency and productivity

PREFERRED EXPERIENCE: 

• A strong leader with experience working with a distributed team
• Strong mentoring and coaching skills 
• Strong communications skills. Able to summarize complex problems for executives as well as drill down to details with architects and engineers 
• Must be a self-starter and self-motivated 
• Minimum of 18 years experience working in industry in related fields
• Minimum of 5 years experience managing large verification teams working on complex verification projects
• Strong understanding of different phases of ASIC and/or full custom chip development is required
• Experienced with development of UVM, OVM, VMM and/or System Verilog, Verilog test benches and usage of simulation tools/debug environments like Synopsys VCS, Cadence IES to test block level/full chip SOCs and FPGAs
• Strong understanding of state of the art of verification techniques, including assertion and coverage-driven verification
• Experience in block level AI, RISC-V, PCIE or NOC verification is a plus
• Verification Experience in protocols like AXI3/4, DDR4/5, HBM, PCIe, Processors, Graphics is a plus
• Experience as a verification architect, establishing the verification methodology, tools and infrastructure for high performance SOCs, VLSI designs and/or FPGAs is a plus
• Experience with gate level simulation, power verification, reset verification, contention checking, abstraction techniques is a plus
• Familiarity with verification management tools as well as understanding of database management particularly as it pertains to regression management is a plus
• Experience with formal property checking tools such as Cadence (IEV), Jasper and Synopsys (VC-Formal, Magellan) is a plus 
•  

ACADEMIC CREDENTIALS: 

• Bachelors or Masters degree in computer engineering/Electrical Engineering 

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Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.